• Based on RISC-V ISA, 3-stage single-issue pipeline, integrated hardware multiplier/divider unit, up to 160MHz frequency

• PMP (Physical Memory Protection) for memory management and protection
• 128 Kbytes Flash (2KB Cache)
• 20 Kbytes SRAM

• Supply voltage range: 2.1V to 3.6V
• Support Power-on Reset (POR), Power-down Reset (PDR), and Low Voltage Reset (LVR)
• Support multiple reset sources including Independent Watchdog (IWDG) and Window Watchdog (WWDG)
• Built-in multiple clock sources
• HSE (High-Speed External) clock failure monitoring
• Support Real-Time Clock (RTC)
• Support backup domain management and tamper detection
• Support clock tree protection

• Multiple serial communication channels: USART, SPI, and I2C
• 1 x bxCAN bus interface, supporting CAN 2.0A and 2.0B protocols

• 1 x 12-bit high-speed SAR ADC: 2MSPS sampling rate, 10 sampling channels
• 1 x 10-channel high-speed Programmable Gain Amplifier (PGA)
• 2 x 4-channel high-speed Comparators

• 2 x 16-bit Advanced Timers
• 4 x 16-bit General-purpose Timers
• 1 x 16-bit Basic Timer
• 1 x 64-bit System Timer

• Support standard JTAG emulation and debugging